Source URL: https://www.theregister.com/2024/09/19/sifive_ai_accelerator/
Source: The Register
Title: SiFive shifts from RISC-V cores for AI chips to designing its own full-fat accelerator
Feedly Summary: Seems someone’s looking for an Arm wrestle
SiFive, having designed RISC-V CPU cores for various AI chips, is now offering to license the blueprints for its own homegrown full-blown machine-learning accelerator.…
AI Summary and Description: Yes
Summary: SiFive has introduced its Intelligence XM series, a set of RISC-V-based machine-learning accelerators designed for various applications from edge devices to data centers. This move aims to enhance competition in AI chip design by allowing organizations to license and customize these architectures, reducing barriers to entry for AI hardware development.
Detailed Description:
SiFive’s recent announcement marks a significant development in the AI hardware space, particularly relevant for professionals working in cloud computing, AI, and infrastructure security. Here are the key points to consider:
– **Licensing RISC-V Designs**: SiFive is offering licensed designs of its full machine-learning accelerators, which are built on the RISC-V architecture. This facilitates others in the industry to integrate these designs into their products, expanding the competitive landscape for AI chips.
– **Design Aimed at Different Customers**: Unlike traditional engagements where SiFive’s CPU cores were coupled with third-party accelerators, the new XM series clusters provide a complete solution aimed at organizations that prefer off-the-shelf designs. This caters to segments that may not have extensive semiconductor design capabilities.
– **Technical Specifications**:
– The base XM cluster incorporates four Intelligence X RISC-V CPU cores connecting to a proprietary matrix engine designed for neural network computations.
– It supports up to 1TB/sec memory bandwidth and can deliver significant performance in terms of tera-operations per second (TOPS) and teraFLOPS (TFLOPS).
– **Scaling Capabilities**:
– The design allows for scaling up with multiple clusters, with Ronco predicting that deploying 8 clusters could yield approximately 64 teraFLOPS of performance. With optimized implementation, it could potentially rival markets’ leading offerings, such as Nvidia’s chips.
– **Support for Open Source**: SiFive will provide an open-source reference implementation of its SiFive Kernel Library to encourage RISC-V architecture adoption, simplifying accessibility for developers and organizations.
– **Comparison with Competitors**:
– While SiFive’s offerings currently may not compete in raw performance with high-end accelerators like the Nvidia H100, they offer a balanced approach that emphasizes factors such as pricing and power efficiency crucial for AI inference workloads.
– **Industry Collaboration**: The involvement of major tech players (the “Magnificent 7”) signifies a reinforced interest in RISC-V architectures, illustrating a trend towards modularity and customization in chip solutions.
This development represents a notable shift in AI infrastructure, pointing to an increasing trend of democratizing access to advanced AI hardware through versatile licensing models, an asset for organizations striving towards customized AI solutions.