Source URL: https://www.theregister.com/2025/03/07/dare_europe_risc_v_project/
Source: The Register
Title: Do you DARE? Europe bets once again on RISC-V for supercomputing sovereignty
Feedly Summary: €240M found for three-year sprint to develop three chiplets for HPC, AI
A 38-strong group of tech players have founded a project with the snappy name Digital Autonomy with RISC-V in Europe, aka DARE, that aims to develop processor units to power the continent’s supercomputers and other high-performance machines.…
AI Summary and Description: Yes
Summary: The text discusses the DARE project in Europe aimed at developing RISC-V based processors for supercomputers, highlighting the effort to establish technological sovereignty in the region. The initiative involves multiple tech companies and is notably relevant for professionals interested in hardware development, cloud computing, and AI security.
Detailed Description:
The DARE project represents a significant step for European technology aimed at achieving digital sovereignty through the development of RISC-V processors for high-performance computing. Here are the major points:
– **Project Overview**: DARE (Digital Autonomy with RISC-V in Europe) is a collaborative effort of 38 tech companies to create processor units tailored for Europe’s supercomputing capabilities, motivated by a desire for technological independence.
– **Historical Context**: Europe has explored the use of RISC-V architecture in supercomputing for several years, transitioning to Arm’s architecture previously but now reaffirming its commitment to RISC-V.
– **Project Support**: The DARE initiative is backed by the EuroHPC Joint Undertaking and coordinated by the Barcelona Supercomputing Center. It aims to design and produce chiplets—small chip dies that will combine to create complete processors.
– **Key Contributions**:
– **Chiplets**:
– A vector acceleration chip for HPC, led by Openchip.
– An inference chip from Axelera AI, which is expected to serve datacenter-grade workloads.
– A general-purpose processor die developed by Codasip.
– **Funding and Timeline**: The first phase of the project is funded with €240 million and aims to achieve major milestones within three years.
– **Axelera AI’s Role**: The company is advancing rapidly in developing RISC-V chips. Their Titania chiplet will be designed for server workloads, boasting high performance and efficiency.
– **Technological Features**:
– Axelera’s chips resemble existing AI ASICs but are geared towards utilizing a RISC-V control core for programming flexibility.
– Features include multiple accelerator cores, a focus on efficient in-memory processing, and notable performance with low power consumption.
– **Market Trends**: The drive towards RISC-V is reflective of a global trend where countries like India and China are also adopting the architecture to boost domestic chip designs and reduce dependency on foreign technology.
– **Geopolitical Implications**: The text touches upon the strategic significance of RISC-V and Western concerns over China’s advancing technological capabilities, particularly in light of legislative actions directed at controlling access to these technologies.
This project underlines the importance of RISC-V architecture in bolstering digital sovereignty and security, making it highly relevant for stakeholders in infrastructure, cloud computing, and tech governance.